Design And Verification Of Clock Control And Power Of Pure Digital Audio Power Amplifier Driver Module

True Digital Audio Amplifier is a branch of the next generation Audio Amplifier, which is as not only high efficiency, small volume and low distortion as classical Class D but also high fidelity based on overcoming the obstacles of low fidelity .The efficiency and audio the audio quality are both satisfied in the system based on True Digital Audio Amplifier. It is widely used in DVD receiver, home theater, car audio amplifier, earphone, audio instruments such as MP3 and mini-device audio system.True Digital Audio Amplifier is mainly composed of two parts: PCM to PWM decoder, power output stage & time control system .The dissertation mainly focus on the power output stage and clock control system.Clock control system is design for 36.864MHz clock generator by crystal oscillator, which is used by digital system as clock source. Based on the requirement of 2.5W RMS power the sub-block and whole chip parameters are proposed after searching mass data and serious and careful reading process library and technology files .The whole chip circuit simulation proved that those parameters is available.Because the dissertation mainly focus on low power output stage, at the first chapter of the dissertation, the audio amplifier history and today and the several tendencies of current audio amplifier is emphatically analyzed. In the next section, the sub-blocks related to the dissertation are explained in detail. At the section of clock control, the clock generation circuit and level shift circuit used by S/PDIF signal sampling is involved. At the section of power output stage, the design disciplines and actual schematics of circuit listed below are proposed: the bias generation circuit, current reference generation circuit, over-current protection circuit, over-thermal protection circuit, H-bridge driver circuit and H-bridge circuit. The simulation waves and analysis are proposed after each sub-block is explained.The circuits in the dissertation can be widely used in digital audio process field as analogue IP core. 36.864MHz is one of frequencies, which are widely used in digital audio field. S/PDIF audio format is one of formats, which are widely used in digital audio field. Based on the two facts above, the conclusion can be drawn: the 36.864MHz crystal oscillator and S/PDIF level-shift circuits have important science and research value and market value. Otherwise ,because of the internal relationship between the classical Class D digital amplifier and True Digital Audio Amplifier ,the power driver stage is not only can be used in True Digital Audio Amplifier but also classical Class D audio amplifier.At the end of the dissertation, the process library and layout design disciplines are introduced and the layout of whole chip of power output stage is proposed.The feature of the power output stage shows below:1. VCC Range: 3.3V~5.5V;2 .Temperature Range:-40℃~125℃;3. Output Power (RMS):2.5W(VCC=5V, Rload =4?, f=1kHz, Temperature=25℃);4. Efficiency: 80% above ;5 .The upper limit frequency: f=10 MHz;...