Data acquisition and processing technology is the base of modern signal processing, it is widely used in field of radar, sonar, software radio, instantaneous signal testing and so on. With the farther development of information science, the demand of signal processing task is becoming more and more onerous and the high performance request of data acquisition is becoming more and more urgent. FPGA(Field Programmable Gate Array) has the advantages of design agility, strong adaptability and reconstruction, while Synchronous Dynamic Random Access Memory(SDRAM) has the advantages of high speed, mass storage and superiority of price, so the method of using FPGA and SDRAM to design a high-speed real-time data acquisition system is widely used.As a part of the high-speed radar image data acquisition and processing project, this task focuses on the design and implementation of FPGA&DDR2-SDRAM-based high-speed real time data acquisition system, which provides a new approach for circuit designs needing mass storage. This paper introduces the design of FPGA and DDR2-SDRAM-based high-speed real time data acquisition system using ripe commercial IP core after researching the structure and working principium of DDR2-SDRAM, with details from overall concept to logic implementation. According tothe features of DDR2-SDRAM, we choose a proper memory access scheduler, use Verilog HDL to realize the system and verify the function of the system at last. The result indicates that this design can meet the system performance target perfectly. |