Dsp Implementation Of Td-ercs Chaotic Pseudo-random Sequence Generator

Pseudo-Random Sequence (PRS) has a good randomness, and strong anti-interference, widely used in various important fields of science and technology. It is a significant research subject of information security that how to construct easy to implement, fast and secure high-performance, good statistical properties of the PRS. Using the better characteristics of chaos to tectonic Pseudo-Random Sequence Generator (PRSG) has practical significance in both theoretical research and engineering applications. In this dissertation, a new method of implement PRSG of Tangent-Delay Ellipse Reflecting Cavity_map System (TD-ERCS) based on its good nature of cryptography and FPGA hardware has been successfully achieved such PRSG with perfect performance criterion is introduced. The first use of 32-bit high-performance floating-point TMS320C6713 DSP as the core processor, based on the integrated development environment CCS 2.2 of DSP, realized TD-ERCS and its Chaos Pseudo-Random Sequence Generator (CPRSG); An application software is devised in Delphi for this CPRSG; According to the criterion of PRS published by National Institute of Standards and Technology (NIST), tested Chaos Pseudo-Random Sequence (CPRS) produced by WIN-TC and DSP. Test results showed that the CPRSG of DSP to achieve the expected effect, and carried out a useful exploration for the hardware implement of CPRSG...