Carrier Synchronization Of Wireless Cdma Communication System Design And Hardware Design

. Spread Spectrum communication has the nature of being anti-jamming, and is an excellent way to achieve multiple access. In the July of 1993, IS95 standard was proposed by Qualcomm company, and was greatly successful in the following ages of second generation mobile communication system. After more than ten years of development, CDMA technology has now come to a point where three standard, WCDMA, CDMA2000 and TDS-CDMA, finally dominant the 3rd generation mobile communication market. Carriers all over the world invest huge amount of money into the development of WCDMA, CDMA2000 or TDS-CDMA system. In the future, CDMA technology will still be in the leading position.The main idea of Software Defined Radio is to take the A/D and D/A conversion as early as possible, when the signal is received by the antenna, so that a universal modularized hardware system, whose functionality, such as modulation/demodulation, encoding/decoding and communication protocol are implemented as software, could be developed. Nowadays, limited by the performance of the AD/DA devices, the research of Software Defined Radio is still confined within digital IF receiver, which has been already implemented based on DSP or FPGA. With the progress of technology, the process of digitization will be taken at the antenna, and a universal Software Defined Radio hardware system will become true.According to the two features mentioned above, in one of the project, the implementation algorithm was figured out, using IS95 as the reference architecture, and the hardware system was designed, following the structure of Software Defined Radio system. The content of this paper could be summed up as below:1. Feature and status of the Spread Spectrum communication and Software Defined Radio2. Theory basis and signal processing of the system. Principle of the Direct Spread Spectrum communication system, sampling theory and the multiple rate digital signal processing are discussed. The procedure of signal processing of the system, including the transmitter and the receiver, is introduced. 3. Design and implementation of the carrier synchronization. As the core element of the carrier synchronization, the digital phase-locked loop is focused on. Structure and parameters of digital PLL are evolved according to its analog counterpart. Matlab simulation is performed to verify the algorithm and acquire the key parameter. Verilog HDL coding, functionality and timing simulation for all the module of the digital PLL.4. Hardware design of the system. Key element of the hardware system and principle of PCB design are discussed.5. System debugging. Specification of debugging, building of debugging platform and debugging result are presented.