Video Front-end Circuit Module Research And Design

The video front-end circuit has wide applications in video consumer-electronic-products,such as RGB graphics processing,LCB monitors and projectors,microdisplays and digital TV.The thesis does research into the core blocks of video front-end circuit,namely,analog-to-digital converter, buffer and lowpass filter.Firstly presented is a 100MS/s,10 bit pipelined ADC fabricated in TSMC 0.18μm 1P5M logic process.The chip occupies 1.35mm×0.99mm(including padring) and consums 175mW.At 14.7MS/s,DNL and INL are less than 0.2LSB and 0.45LSB,respectively,Peak SNDR and SFDR are 59.8dB and 70.0dB, respectively.At 100MS/s,DNL and INL are less than 1LSB and 2.TLSB, respectively.Peak SNDR and SFDR are 49.4dB and 66.8dB,respectively.The thesis focuses on the ADC architecture and circuit techniques employed. Considering the relatively large noise measured at 100MS/s,noise sources in the ADC and test results are analyzed,which provides good reference for designing ADC with large SNR.Secondly presented is a video front-end circuit designed also in TSMC 0.18μm 1P5M logic process.The entire video front-end circuit includes an ADC, in which an SHA provides variable gain(as a PGA),a buffer,a broadband lowpass filter and a clamping circuit.The buffer is realized with a source follower.The broadband lowpass filter is a sixth-order Active-RC Butterworth one,consisting of three biquards using feedforward opamps,with a variable cutoff frequency of 10/20/40MHz.Both circuit design and mask design have already been done.The die area is 2mm×2.5mm(including padring),with power consumption of 270mW.The thesis discusses circuit behavior of the source follower.In addition,it summarizes implementation methods of filters and gives the analysis and design of the filter and the feedforward opamp.Lastly,it provides the system simulation result.