Downhole Intelligent Transportation Systems In Low Bit Rate Voice Transmission

With the development of speech technology application, more and more speech-signal digital processing system has to be real-time mode or to be on-line mode. The requirement of hardware environment is higher and higher, especially in the design of embedded system. The speech-processing arithmetic is more and more complicated and ability not equal to our ambition that to deal with speech-signal real time with common processor. Special speech-chip can resolve the problem of parallel and speed of speech-signal processing, so the application on the speech-signal processing system is especially important.Use the predominance of new programmable logic chip on digital signal domain lucubrate on the implement with FPGA of speech signal low bit rate coding. The first chapter reviews the status of low bit rate speech coding. Then, in the second chapter, give a more detailed analysis of the LPC vocoder codec principle, and its shortcomings were presented. On this basis, other LPC-10 vocoder simulation is played. Finally, by using residuals instead of periodic pulse excitation - random noise binary excitation, s the quality of synthesized speech has been some upgrading.In the third chapter, the electronic system design trends are analyzed, we pointing out that the FPGA is the main streams of electronic design in the future. Then, the internal structure of programmable logic devices were introduced, and discussed the content of EDA design flow. Finally, Static timing analysis was introduced, as well as synchronization solutions were given between asynchronous clock domain. In the fourth chapter, give an implementation of the auto-correlation, Shure recursive, discrete cosine transform in a hardware environment. In the last chapter, some advice on the follow-up of low bit rate coding is given.