Based On The Design And Realization Of Fpga-e1 / Ethernet Data Adapter

E1 / Ethernet adapter is used to connect G703 interface and Ethernet interface device. The E1 interface is a common interface standard, in the current military systems, electrical systems and other large systems in the transmission network, the use of existing rich E1 channel resources to achieve greater and greater amount of information transmission, with a strong market value and application prospect. The adapter system has achieved 6-channel E1 main link data, 2 G.703 custom data formats and Fast Ethernet interface, data conversion, depending on the device's structural elements, to design compact, low cost and convenient future System upgrades and maintenance. E1 / Ethernet adapter hardware design and FPGA logic design were implemented in this paper, as follows:1. E1 / Ethernet adapter's hardware designAccording to the actual structure of the indicator device comparing the existing design, we use FPGA and dedicated E1 interface chip to achieve. The advantages are: the design is full of advantage of FPGA design, remodeling and strong, greatly shorten the development cycle, from the cost savings more than doubled in the latter system, the upgrading of business, also very convenient to ensure the system stability and reliability the basis of sex, which greatly enhance the competitiveness of their products.2. E1 / Ethernet adapter's FPGA realization of logic functionsE1 and Ethernet data format data format conversion was implemented by FPGA. Including the E1 two-way data and Ethernet data reception and transmission, including custom data formats and data formats of existing Ethernet data conversion, to achieve the maximum functionality, to ensure correct data transfer and synchronization is the focus of the design part. Equipment had two FPGA chips, including a spare chip, for future equipment upgrades to provide a more convenient condition.3. E1 / Ethernet adapter's key technologyThe device, in the actual development process, was designed by Xilinx's ISE FPGA design software and development tools and Cadence's Allegro PCB 15.7 to complete the design. Implementation of hardware and logic implementation is divided into parts. In the hardware design part, E1 interface circuit parts and the equipment in the power section is designed to focus the design before the study to be based on improved ways to increase protection circuit and a variety of configurations. Hardware PCB (Printed circuit board, PCB) design, equipment size and wiring requirements as full consideration in the design and signal integrity problems cascading basis, to multilayer design (8 layers). The concept of carrying was embodied by the implementation of multi-chip data conversion and transmission in a chip. Frame synchronization detection module and the Ethernet checksum were difficult designs, development and design of the actual use of state machines and dual-port RAM and a number of FIFO to achieve the proper storage and handling of dataAchieve a variety of data conversion as E1 / Ethernet adapter has a very wide application and great market value of the equipment has the advantage of: microcontroller to rely completely abandon the operation, all the FPGA logic design through completion, consistent with the current design mainstream, for the subsequent design of a modular logic program, for future upgrade and maintenance of equipment has laid a good foundation; maximum data transmission capacity and the right to meet under the premise of maximum lower cost, and enhance market competitiveness .In the final stages of debugging and validation, through the device of separate debug and joint commissioning with other equipment, not only to achieve a cascade E1 data transmission and accurate conversion between the Ethernet data, also added a custom data format and G703DATA Ethernet data conversion, to achieve a variety of data conversion. Under ensuring the device functionality, we greatly shortened the development cycle and reduced the design cost.