The Design Of0.1Hz Vlf Sinusoidal Waveform Voltage Withstand Test System

With the implementation of projects for upgrading urban power grid, a large number of XLPE cable is used in urban power grids, and the normal operation of XLPE cables affects the safe and stable operation of the entire power system. In order to ensure the normal operation of power cable, the power cable must be effectively voltage withstand test. But the equivalent capacitance of the power cable is relatively large, if using the traditional AC voltage withstand test, the capacity of the test equipment requirements will be high. In order to reduce the test equipment capacity, many countries begin to adopts the0.1Hz VLF withstand test technology for cable voltage withstand test.0.1Hz VLF withstand test reduces the test voltage frequency to0.1Hz, so the equipment capacity is only1/500of the power frequency voltage withstand test in theory, and it is the important method for power cable withstand voltage test.This paper first describes the development status of the0.1Hz VLF withstand test methods, compares several methods commonly used in power cable voltage withstand test, and analyzes the advantages and disadvantages of various methods. Then the paper analyzes the cascade multilevel inverter and carrier phase-shifted SPWM modulation algorithm, and design a0.1Hz VLF sinusoidal waveform voltage withstand test system on these basis, the system can output frequency of0.1Hz and in the range of0-30kV adjustable high voltage, and meet10kV and below voltage power cable voltage test requirements. The system mainly consists of main circuit and control circuit, the system main circuit uses a single-phase bridge diode rectifier circuit and cascade multi-level inverter, and the output circuit using LC low-pass filter. In order to achieve control of the output voltage of main circuit, the system uses the voltage feedback PID loop control policy, and the control circuit uses DSP and CPLD to design. CPLD is mainly used to collaboration with the DSP to carrier phase-shifted SPWM modulation algorithm and generate SPWM pulse. DSP as the main chip of the system is mainly used for the design of test circuit signal acquisition and system protection.Finally, using Matlab/Simlink build0.1Hz VLF sinusoidal waveform voltage withstand test system simulation model, then by analysing the results to verify the feasibility of the design and the voltage waveforms can meet the relevant standards of the VLF withstand test.