Tv Seeker Target Tracking Technology Studies

This thesis designed a set of target tracking display system that taked FPGA EP2C8 chip as the central processor for the low-cost TV seeker. The hardware circuit of the system included the smallest system circuit constituted by FPGA, clock circuit, reset circuit, power supply circuit, video capture and display circuit with video codec chip, reset circuit of VCM board, DSP mode select circuit, as well as I/O ports circuit for VCM board.The target tracking display system included FPGA, CCD camera, Decoder SAA7113, Encoder SAA7121 and display. The CCD camera is responsible for capturing analog video signals. The decoder SAA7113 digitizes the video signal and output to FPGA. FPGA captures the digital video signal and processes such as the completion of OSD. The encoder SAA7121 completed A/D convertion of the video signal and then transmitted to the display. FPGA, the central processor of target tracking display system, mainly to complete the image capture, serial data reception, the location information of target characters adding, video display and so on. In this way, it reduces the computational burden of DSP chip in the VCM image processor, improving the real-time performance of system.Finally, the display system was debugged. The test result shows that the system design is correct and reasonable. It optimizes the whole structure of system as well as better meeting the needs of the design.