| CDL(common data link) collect reconnaissance, advice, command, communication which is important system, CDL change for data, voice, picture and sensor in each control center which play the role of central system. CDL transmit objective data, change tactical advices, exert maximal systemic capability aimed at large capability, common, broad band, share of resource and coordinated attack. Finally, CDL can achieve telemetric in deep-dyed sense.CDL in the capsule of plane is a point to point communication data link between sky and sea which transmit great capacity, high-speed spy data (include audio frequency, video frequency, picture, date) to marine in a limiting dimension of capsule. The key technology of CDL is high-speed data OQPSK modem, which are the investigation emphases of the thesis.In this thesis, We analyze the status in quo and development of CDL about USA, and the trait of CDL in the capsule of plane about USA. In allusion to circumstance in the capsule of plane, We design mini dimension for CDL in the capsule of plane. According to deployment of Ku frequency, The box of modem designФ295.8mm×450mm dimension in the light of 6U CPCI, Radio designФ293.5mm×550mm dimension, antenna and steno designФ2934mm×170mm dimension, Finally, collectivity designФ295.8mm×1120mm dimension. According to deployment of Ku and X frequency, collectivity designФ295.8mm×1790mm dimension.In this thesis, the basic investigation object is high-speed OQPSK modem, and on the basic of the deep analyze of OQPSK modem, the thesis gives novel and intensive study of timing recovery and carrier recovery.The main contents are as follows:1. Study the theory of timing recovery of OQPSK modem and the FPGA realization. The thesis gives a timing recovery method based on Gardner timing error detect which need only two interpolations. The interpolation is realized by subsection parabola interpolation filter using Farrow configuration. The algorithm is independent of carrier recovery. Result shows this algorithm has low clock jitter, short synchronous time and high quality.2. Study the theory of carrier recovery of OQPSK modem and the FPGA realization. The thesis use COSTAS loop to realize high-speed data carrier recovery. Result shows this algorithm has short synchronous time and high quality. |
