Designing Of A Radar Digital Signal Processor Based On FPGA

With the development of Large Scale Intergate Circuit (LSIC), the radar signal processor is widely used in the missile seeker. The appearance of LSIC makes the missile seeker smaller and more reliable, While, the remarkable merits of Field Programmable Gate Array (FPGA) in collateral processing speed, instrument volume and design flexiblity will get radar signal processor higher performance. Therefore, it is of great significance to develop a radar signal processor utilizing the platform of FPGA.First, this paper briefly introduces the theory of PD radar (Pulse Doppler Radar) and, Digital Beam Forming (DBF) algorithm , then analyzes the performance of the usual DBF algorithm based on a project on radar seeker. After that, according to the reqirment of the aproject, a scenario base on DBF is proposed. And the hardware design, software design and the design of sub-mouble is completed. Xilinx Virtex4 SX55 FPGA is selected as the key instrument. What's more, the design of the baseband signal generation module, the echo signal acquisition module, the control signal generation module and the clock circuit are deeply explained. PCB plating design is also optimized according to the demand of the system performance.In the testing process of the system, computer technology is used for building system functional validation platform, based of this platform, ideal DBF function is tested. Under certain darkroom conditions, DBF function of radar signal processor is tested. All testing results from computer testing platform and darkroom testing platform show that the hardware performance of radar digital signal processor can satisfy the requirements of detecting targets using DBF.