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The Design Of CAN Bus Soft Core Supported Multi-Fieldbus Integrated

Posted on:2013-01-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y C ZouFull Text:PDF
GTID:2218330371460665Subject:Mechanical engineering
Abstract/Summary:
Field Bus is the underlying technology to improve the overall level of automation system, the impact on the national economy is growing, and CAN bus is the only one approved as an international standard Field bus, but in the domestic market the present CAN bus chip products are mostly foreign companies.On the other hand, the Field Bus technology despite has developed for many decades, but have failed to complete the international standards so far, and with the development of the automation technology and communications technology, multi-FieldBus product co-exist in a control system has become a real problem. So,take full advantage of the latest division of IC design industry, providing an entry point for our IC design industry-IP core design, to design Field Bus soft-core based on the Hardware Description Language, to promote the transfer between the buses and the establishment of a Uniform standards fieldbus, has great significance.The paper's main tasks are as follows:(1) Studied the CAN bus research status, and introduced the technical features of CAN in detail, including the bus level, bit encoding, protocol hierarchy.Learned the key technologies needed to design the CAN soft core, including verification and message filtering, error handling and bus bit timing, etc, providing the theoretical basis for the soft-core design.(2) Proposed a multi-fieldbus integrated program which based on FPGA and Ethernet, and completed the frame design.(3) According to the CAN bus protocol and top-down design process, using VerilogHDL hardware description language, divided the soft-core into three main modules, completed each module's HDL language design and functional simulation. Finally, Made Top-level files to complete the submodule integrated called. And the soft-core compatible CAN 1.0 CAN 2.0 two modes.(4) designed the test vectors in detail which used in logic simulation and called testbench, using the test vector file to complete the function simulation of the CAN soft-core. (5) Described the characteristics of FPGA technology and Altium Designer software. Designed the Cycloneâ…¡series FPGA development board schematic and PCB board, including the power supply, interface configuration, SDRAM circuit module With Altium Designer software.(6) designed a test platform for CAN bus using Philips' SJA1000 and PCA250 chip, and completed the test platform's C-language test code used to test CAN soft-core. In practice, the designer can use this soft-core as a communication module through the FPGA implementation or to quickly build a Field Bus communication system to realize flexible CAN bus interface solutions.
Keywords/Search Tags:CAN bus, soft-core, FPGA, Verilog HDL, Multi-Field Bus
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