Design And Implementation Of Cross-station In Cable Telemetric Seismic Instrument

At present, the energy consumption demands sharp increasing, a number ofresource exploration projects ongoing. Seismic exploration, as a commonly usedgeophysical method has been widely applied in the field of resource exploration.Domestic seismic exploration instrument is largely still dependent on imports,especially large-scale telemetry seismograph system, almost entirely dependent onimports; this situation has seriously hampered the development of domestic geologicalexploration. In this paper, based on wired two-dimensional telemetry seismicexploration instrument, it develops telemetry seismograph cross station to achievethree-dimensional seismic exploration. Cross Station as the telemetry seismographcore unit, responsible for fast-forwarding seismic data acquisition in all directions inthe array. In this design the cross station uses the PowerPC+Linux framework,realizes seismic data transmission network in the TCP/IP protocol, and has the dataacquisition function to collect data of reference channel and secondary channel. Inthis paper start from the system architecture, focus on building software and hardwareplatform and writing driver program, the major work done are as follows:The study compared the function and structure of foreign advanced seismographCross station, combined with the characteristics of the seismic data transmission, thetopology of Ethernet-based relay in the two-dimensional seismic exploration isextended to the three-dimensional exploration. Dynamically assigned IP address usingUDP broadcasts in the three-dimensional seismic exploration, and analysis of themechanism established by the assign of dynamic IP and routing table in relaytopology, use GNS3network simulation software, and analyze a relay-style with threemeasured line critical path network data transfer speed of the network topology andverify the feasibility of the Relay topology in three-dimensional seismic exploration.Design of cable telemetry seismograph cross station with five Ethernet interfaces,which can connect with the host computer, upper and lower levels cross, gatheringstation with the same survey line. The host computer via a crossover station to controlthe acquisition of the measured line station to complete the recovery of the seismicdata. By analyzing the mainstream microprocessor and operating system features, thisdesign uses a PowerPC chip and Linux systems to design cross station. The PowerPC chip has a rich peripheral interfaces, its QUICC Engine technology to provide highernetwork data throughput; Linux support for TCP/IP protocol, able to meet therequirements in the network transmission. Hardware side, this paper designed variousparts of the cross-station hardware module, including the processor module, powermodule, network module, data acquisition module, The system uses a66MHZ clockfrequency, the selection of the PCI agent mode, set the reset control word from thelocalbus. The system is configured with128M SDRAM,16M FLASH, and GPCMmode designed for8bit interface for connection and data acquisition board. Thesoftware side, combination of hardware system it analyzes Linux platform buildingprocess, including the U-BOOT transplantation, DTS to write, the Linux kerneltransplantation and the production of the root file system. The focus on design MIIinterface with the GPCM mode bus interface configuration.In this paper, we have studied the MPC8360’s I/O memory mapping and interruptprocessing of the correlation function, according to the state of the internal FPGAlogic, the type of data stream of the assembly module and the acquisition module’sworking status, including the reset, the A/D power, the work of the A/D, the A/D stop,and so on, design of FPGA-based acquisition module character device driver.completed the preparation of the various parts of the driver within the framework byanalyzing the basic framework of the character-driven equipment, including theregistration and cancellation of the driver, the device to open and release,the deviceread and write operations, device control, device interrupt. The ultimate realization ofthe internal registers in the FPGA to read and write, and complete control of dataacquisition module.Finally, we tested the hardware platform and software platform, they can workproperly. Network interface test results meet the design requirements; acquisitionmodule through read, write and interrupt tests, and we got the desired effect in thesine wave and short acquisition tests.