Multi-channel Data Acquisition System Based On High Speed Sampling ADC

The Large High Altitude Air Shower Observatory (LHAASO) is a high altitudecosmic ray research center with international leading high sensitivity, wide spectrumand super gamma sky ability, which is based on the Yang-Ba-Jin cosmic rayobservatory in Tibet, China. Its core scientific goal is to seek the source of cosmicrays and do the cosmic evolution, high-energy celestial evolution and dark matterresearch, through whole sky gamma source scanning and accurate measurement on thegamma ray spectroscopy and accumulating statistical samples of all kinds of gammasources.The1km2detectors array (KM2A), as the main component of LHAASO’sdetector arrays, is consisted by5137scintillation detectors (EDs,15m space eachother), which are to measure the secondary charged particles in an air shower, and1209muon detectors (MDs,30m space each other), which are to measure the muons.The two kinds of dectectors are in Triangular arrangement. Detected signals are readout by the same Module Photomultiplier Tubes (PMT). Charge and time informationshould be measured completely and efficiently by readout electronics for everychannel.This thesis introduces a waveform digitalization scheme based on high speedFlash Analog to Digital Convertor (FADC), which is designed for the readoutelectronics of LHAASO’s ground particle detectors. According to the Nyquist-Shnnonsampling theorem, in order to ensure the sample precision, the output signal of PMTmust be shaped by a shaping circuit, the amplitude will be linear relationship betweenthe input and output signals, but the waveform will be widened. The widenedwaveform will be sampled by a500Msps ADC chip (AT84AS001). The digitizedsignal from the ADC will be send to Field Programmable Gate Array (FPGA) tocomplete four channels data pre-processing before transmitted to the host compute.This thesis mainly studied the following parts:1. System total circuit design,including analog circuit module, ADC module, FPGA module，clock mudule powersupply module and VME module；2. PCB design followed by the6U VME bus rulesand FPGA logic function designed by Verilog HDL language;3. adjustment and test ofmulti-channel data acquisition system.The test result shows that the high speed waveform sampling module worked in a good performance and the waveform sampling rate is500Msps. The DNL (differentialnonlinearity) is±1LSB, the SINAD (Sign-al to Noise and Distortion Ratio) is56.69dB,the ENOB(Effective Number of Bits) is9.1bit.