Research And Implementation Of High-power Single-phase Digital APFC

In the single-phase power grid, with the rapid development of electronic technology,more and more electronic equipments have been flung into grid, in particular the widelyusage of converters which utilize electrolytic capacitors and rectifier as the pre-levelcircuit like switching power supply circuit and AC-DC-AC inverter circuit, thus hasresulted in serious harmonic current pollution to the grid. As the major and effectivetechnology to solve the harmonic current pollution, Active Power Factor Correction(APFC) has been the focal technology in the electronic field and achieved intensiveresearches and development. The following aspects have been studied in this article:Research, analysis and summarization works have been carried out in detail about thedevelopments, study status, topology structure, working principle, control strategy andtwo main harmonic current standards (IEC61000-3-2and IEC61000-3-12) of APFC. Theresearch goal of this article is selected as the high-power analog APFC and the high-powerdigital APFC;Researches are performed on high-power analog APFC. Adopting specific analogPFC control chip L4981B, a high-power APFC circuit has been designed. The blockdiagram and working principle of L4981B has been studied in detail, in case of that thefollowing work has been carried out: designing and selecting the parameters of externaldevices particularly the power boost-inductor, power switch, as well as the filter capacitor.The characteristic of modulation switching frequency for L4981B has been studiedseriously especially. The simulation work has been performed by adopting SIMULINK tovalidate the feasibility of the whole circuit. The results of high-power experiment deepenand rich the study power-grade in the single-phase analog APFC field;Analysis works are implemented on the working principle of bridgeless power factorcorrection (BLPFC) and the control strategy of partial PFC (PPFC). By combining themerits of the BLPFC and PPFC, a bridgeless partial APFC (BPPFC) circuit has been designed, which adopted the smart power module (SPM) FPAB50PH60as the main powercircuit devices and MCU ST7MC1K2as the controller. Then the other devices aredesigned and selected seriously such as the output filter capacitors, boost inductor and soon. The simulation work and high-power experiment work are performed as well. In viewof the both results, the essence of BLPFC is summed up;Studying works are executed on the digital realization of the analog APFC. Byadopting digital signal processors TMS320LF2808as the core controller, the hardwarecircuit and related peripheral devices are designed. The multiplier control strategyalgorithm which included the current control loop, the voltage control loop and amultiplier are realized by software and some other digital algorithms are implemented aswell such as digital PI algorithm, digital filter and so on. The whole circuit is validatedfinally and achieved good experiment results which satisfied the design intention.