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Loop Model And Circuit Design Of A CMOS Synchronous DC/DC Converter

Posted on:2013-02-12Degree:MasterType:Thesis
Country:ChinaCandidate:F Z KongFull Text:PDF
GTID:2232330395456902Subject:Power electronics and electric drive
Abstract/Summary:PDF Full Text Request
In this paper, the basic structures and working principles of Buck synchronous rectification converters are introduced. And the various control modes of DC/DC converters are discussed which focuses on analying of the peak current mode control. Then, based on the small signal model of the current control mode step-down DC/DC converters, the impact of ramp compensation and current loop sampling gain to the loop stability is studied and the compensation of the entire system control loop is completed. Finally, according to the system design specifications, the main modules of the chip are designed.Based on the Cadence Spectre simulator environment, the whole circuit is simulated with the SMIC0.35um process, the whole layout and the functional simulation is completed. The input voltage range of this converter is2.5V-5V, the minimum output voltage is0.6V, and the rated output current is1A. The working frequency is1.5MHz under normal operating conditions, but when the feedback voltage is less than the rated voltage, the working frequency is210KHz. The load regulation of this converter is0.286%and the efficiency is93.78%. This chip can be widly used, such as mobile phones, portable media players, digital cameras, portable electronic devices, wireless network card, ADSL/XDSL, etc.
Keywords/Search Tags:Buck converters, Synchronous rectification, Loop stability, Peak current control mode
PDF Full Text Request
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