Analysis And Application Of Dual-loop Model Of Current Mode Buck Converters

The development of automotive electronics,medical instruments,communication networks and other fields has brought a strong driving force to market demand of power management IC.To meet the requirements that power supply should provide more power with smaller size and less cost,point-of-load(POL)power supply is widely used in the increasingly sophisticated electronic systems in these fields.The current mode Buck converter is very suitable for this kind of large current application due to its fast transient response and automatic parallel current sharing.Aiming at peak current mode Buck converter,the small signal model of current control loop and voltage control loop are established in the thesis,and the analytical expression of the phase margin and loop bandwidth are given to guide the optimization design of steady state performance parameters and transient response speed of Buck converter.In this thesis,a dual-output Buck controller chip is designed.The simulation and test results verify the loop model and the conclusion of theoretical analysis.The work and innovation of this thesis are as follows:(1)Based on discrete time domain analysis,a precise small signal model of the voltage loop under constant frequency control in z domain is established,from which the small signal model in s domain is obtained by using series expansion and approximation.The analysis method of phase margin of current loop is proposed,and the analytical expressions of the phase margin and slope compensation are given.Taking the constant phase margin of current loop as the design objective,the design principle of piecewise linear slope compensation is presented quantitatively,which guides the design of piecewise point and segment number,so as to ensure the stability and dynamic response speed of the current loop.(2)In aspect of circuit implementation,the error amplifier and LDO are optimized to improve the performance of the Buck converter: To improve the performance of the error amplifier,a transconductance amplifier with high gain,high transconductance,high common mode rejection ratio and low offset voltage is designed and implemented,which improves the output voltage precision of the whole circuit.A slope recovery circuit is designed to clamp the output of the error amplifier dynamically according to the duty ratio,which improves the load capacity of circuit and the load regulation underlarge current situation.A dual-loop control linear regulator circuit combined by the low precision,high bandwidth inner loop and the high precision,low bandwidth outer loop is designed,which realizes the unity of high output accuracy and fast transient response speed,and satisfies the demand of stable power supply for the bootstrap drive module.Based on 0.35μm 40 V BCD process,a dual-output Buck controller chip is designed and implemented.Simulation and test results show that the load regulation is0.5% in the load range of 0 to 4A,and the line adjustment rate is 0.06% when the input voltage changes from 7V to 30 V.The chip supports Burst mode and PWM mode.In PWM mode,the recovery time is 40μs,overshoot voltage is 50 m V/50 mV at 2A load step.When the load reaches 1.8A,the peak efficiency is higher than 90%.The test results indicate that the function of the dual-output Buck converter controller chip in this thesis is normal,and it achieves both high output accuracy and fast load transient response.