Design Of Adaptive De-ringing Filter Based On FPGA

Because of People’s requirement of clearer image visual effect and the limitation oftransmission bandwidth, it is necessary to compress the image/video before transmitted. Thecurrent mainstream image/video compression standardization,e.g,MPEG-4,H.264andJPEG2000， is based on Discrete Cosine Transformation(DCT) or Discrete WaveletTransformation(DWT). The quantization follows the transformation, so the above methods ofcompression encoding are loss compression in essence and result in ripple noise (morenoticeable around the image edge).The main research of this paper is the design of adaptive de-ringing filter using themethod of image enhancement. Referring to several de-ring porcessing structure, this papermake improvement and compromise in de-noise effect, image blur and hardware consumptionaspect and propose a new de-ring processing structure.In algorithm aspect, A novel image search method (only searching the2-pixel widthrange around the image edge) is proposed by doing experiments. Because this search methodis insensitive to the accuracy of image edge, the simple operator (e. g, Prewitt operator) couldbe adopted to detect image edge and thus reduces the computation steps and hardwareconsumption. And a new block-pixel effective pattern discrimination method is also putforward and the pixel level discrimination is the key point. The former algorithms mainly d idthe discrimination only in block level, regardless that the pattern of pixels may be completelydifferent, causing the image over-smoothing and incomplete filtering. The patterndiscrimination method proposed in this paper could cause less computation time, accuratepixels classification, less image blur and improved filter effect.In hardware aspect, the numerical value of the piecewise-linearization fuzzy filter isrectified to be suitable for the realization on hardware platform; a novel parallel structure ofreverse input and operation is designed to improve the efficiency of SDRAM reading, thereverse output could be auto reversed in the structure and additional circuits are not necessary.This paper realize the design of de-ring algorithm on the Cyclone II serials FPGAplatform of Altera company, and do the verification of module and system on different levelsand platforms. The input of the system is RCA interface in DVD and the output is the VGAinterface of the monitor. The verification result shows that our design could effectively reducethe ring noise while preserve the image details.