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The Design Of Adaptive PID Controller Base On FPGA

Posted on:2013-09-17Degree:MasterType:Thesis
Country:ChinaCandidate:X R CaoFull Text:PDF
GTID:2248330374990211Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the advantages of the simple algorithm and the good stability, the traditionalPID controller is still widely used in the field of industrial control. However, in theactual control many process mechanisms are quite complex, which is difficult todetermine a precise mathematical model, and there exist some degrees of uncertainfactors like nonlinear or time-varying. So it is difficult to meet the controlrequirements by using the traditional PID controller. Neuron is the basic unit ofconstituting neural network with adaptive capacity, simple structure and easy tocalculate. By fusing the two advantages, to some extent, it can solve some complexprocesses that the traditional PID controller is difficult to deal with,and make updeficiency of the slow parameter time-varying systems.As there is no corresponding hardware to support,neural network control iscommonly realized by using the software programming, this will lead to slow down theoperation speed so that it is difficult to guarantee real-time control requirements. Inrecent years, with a wide range applications of FPGA, and it has many greatcharacteristics as follows: powerful functions,low investment, short cycle and repeatedmodification, especially the parallel processing power makes it be able to provide avariety of complex operations for digitization, which is quite suitable for using it todesign some intelligent controllers with high processing speed and real-timerequirement. Based on this, using FPGA it designed in the article a gain self-adjustingsingle neuron PID intelligent controller.This paper reports a gain self-adjusting single neuron PID controller which wasrealized based on FPGA (field programmable gates array). Using Quartus II9.0andModelsim6.4as its development environment, this PID controller was designed bytop-down method and completed by Verilog. it showed that the results was accurateand the design process was reasonable by the close-loop test and simulation. Besides, aflexible IP core has been formed. The PID controller is suitable for the control systemsthat require intelligent operating strategy, real-time and high rapidity, and has a goodapplication value. Besides, A/D, D/A interface and RS-232interface were integrated inthe FPGA, through the RS-232interface, it is convenient to communicate between thecore module of controller and processor, and enhances the adaptability so that it isbetter to constitute the perfect systems.
Keywords/Search Tags:field programmable gates array, gain self-adjusting, single neuron, PIDcontroller, RS-232interface, IP core
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