Hardware Design Of An On-chip Debug System For8051MCU

As the increasing complexity of electronic products and industrial control, the H&Sdevelopment based on MCU becomes more and more difficult. So it’s very important to usea comprehensive set of real-time debug system in the development. Under thiscircumstance, this paper designed an on-chip debug system for industrial8051MCU whichis used widely.with the process of ASIC and put the all debug fuction into one chip.Thework includes the researching of demand and proposal, implementing, simulation,verification and back-end design.This on-chip debug system can provide the8051MCU with the complete ability ofreal-time debugging and have all features of commercial emluator. It not only can make the8051halt, run, step into or skip an instruction, but also can read and write all registers,internal and external program memories, data memories and SFRs. Hardware breakpointscan be set and controlled on all memories and registers and they are executed if any writingor reading occurrs at particular address with certain data pattern or without. A three-wireinterface is used by the debug system to connect computer which takes less space than thestandard JTAG. The paper used Verilog HDL to describe the entire system.After that,simulation was made with the Mentor’s ModelSim for each fuction. It was then synthesizedand P&R with the SMIC0.18μm technology library with the tools of Design Compile andAstro from Synopsys. Static Timing Analysis with Primetime was also added on to ensurethe timing closure. The system is implemented and verified on Xilinx’s xc3s400FPGA.Results shows the system can effectively avoid the disadvantages of traditional debugmethod based on software simulation, emluator or JTAG and it also can save much moneyfor users and improve debug efficiency. The introduction of the debug system has no effectto the original performance of8051and the proposed design method is also applicable toother microcontroller.