Design And Implementation Of Digital Filter Based On FPGA

In this thesis, to eliminate the noises in real-time in high-speed Data Acquisition System based on FPGA, the sample frequency of which is400M/s, a32orders filter is designed by the application of Distributed Algorism and the filter coefficients can be replaced in necessary. The filter structure is divided into modules to simplify the implementation of the filter. And the simulations are also done to verify the functions of the filter. The main contents are as follows.Firstly, the filter coefficients can be obtained by using the FDA Tools in MATLAB based on the theories of digital filter. Then the quantification of these coefficients is also done.Secondly, the whole structure of the adjustable digital filter of32orders has been designed by use the combination of serial and parallel Distributed Algorism.Finally, the filter of32orders with replaceable coefficients is implemented with the use of VHDL in Quartus â…¡8.1by divided into modules.