| Corona discharge caused by device damage is one of the serious reasons that cause the most power loss during high voltage transmission process. When electrical equipment working normally solar-blind ultraviolet corona detector can detect corona accurately, tell the exact location of corona discharge and guarantee safe and efficient operation of power equipment, which has become a vital way to power equipment maintenance. Based on solar-blind ultraviolet corona detector project undergone by a certain scientific research institute, this thesis researches and designes the image information processing system of the solar-blind ultraviolet corona detector, the main work is as follows:First of all, based on introduction of Townsend discharge principle, the formation mechanism of corona discharge has been analysed. According to radiation spectrum when discharging, the selection of the spectral detection range as well as the structure of solar-blind ultraviolet corona detector system has been discussed, what’s more, the digital video signal standard ITU-RBT.656of digital image information processing system of solar-blind ultraviolet corona detector has been introduced.Secondly, this thesis is aimed to design image information processing system of FPGA-based solar-blind ultraviolet corona detector, which realizes image acquisition, storage and algorithmic processing, in which contains power supply module, video decoding module, storage module and FPGA control module. Moreover, with FPGA, the system is able to initialize configuration of video decoding module, undergo data acquisition and control, as well as data storage, furthermore, relationship between SDRAM working timing and the FPGA system clock, data read and write across clock-domain, are considered as well as ping-pong reading, writing and timing.Finally, image processing algorithms of solar-blind ultraviolet corona detector based by FPGA has been realized, which contains image fusion, median filtering, edge extraction and achieves a quick algorithm which improve processing speed of the algorithm based on traditional median filtering algorithm; Edge detection has been achieved with sobel operator, moreover, this algorithm has been undergone timing simulation, the Signaltap debugging and co-simulation between modelsim and matlab, whose results show the correctness and validity of the FPGA algorithm. |