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Research On Composite Electronic System Based On Triple Modular Redundancy

Posted on:2014-01-11Degree:MasterType:Thesis
Country:ChinaCandidate:J Y ChenFull Text:PDF
GTID:2248330395976065Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Composite electronic System is the hinge of the Pico-satellite, which undertakes the work of data processing, data storage, data transmission, Instruction code transmission and Instruction execution. So it’s one of the most important parts of the Pico-satellite. As a result, its performance and reliability could represent that of the whole Pico-satellite in significant measure.We can draw a conclusion that Single Event Effects (SEE) is one of the most important factors who affect the reliability of the Composite electronic System according to the corresponding research at home and abroad. In order to weaken the SEE’s influence on the reliability of Composite electronic System, this article presented a design proposal of composite electronic System based on TMR (Triple Modular Redundancy) according to the design requirements of the TMR and the Second-generation Pico-satellite in our laboratory. This design proposal uses three DSPs and one FPGA as the framework of the TMR system. As a result, this article completed the system design, hardware platform structures, hardware debugging and joint debugging with other related systems in sequence.The crucial technology of the TMR system is redundancy and synchronization according to the intensive study on TMR. The effect of the synchronization can even affect the performance of the TMR system directly. The above design proposal takes use of Clock synchronization technology to integrate the application requirements of the second-generation Pico-satellite in our laboratory. For redundancy technology, this article presented a design proposal of redundancy integrated with the EMIFA port of the DSP. For synchronization technology, this article found out the technological difficulty of clock synchronization, especially when the process runs at the extended memory.
Keywords/Search Tags:Triple Modular Redundancy, clock synchronization, DSP, FPGA
PDF Full Text Request
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