| RF power amplifier is the core driving force of the development of radio frequencyintegrated circuits. As one of the key devices in RF power amplifire, RF power devices arerequired to suffer high voltage, low on-resistance, high frequency, small size and simpleprocesses. In this thesis, two novel RF LDMOS structures are proposed to meet those features,and are investigated from the basic characteristics and fabrication process with the TCAD tools.First, this thesis proposes a new RF SOI-LDMOS structure with a drift region of variationlateral thickness. Compared with the conventional RESURF device, the thickness of the driftregion increaces linearly from the source region to the drain region in this new structure. Byresearching the basic characteristics in use of the Silvaco software, the results shows that thisnew structure effectively improves the surface electric field, and presents a high breakdownvoltage, a low on-resistance and a high cut-off frequency. Then, a process CMOS-compatibleprocess with an additional LOCOS technology is proposed to fabricate the VLT device. Theprocess conditions and parameters are optimized by using the Tsuprem4tools. This proposedprocess provides a new way with lower cost to fabricate the RF SOI VLT LDMOS.Second, a new RF LDMOS structure with a vertical drift region is proposed in this paper. Inthis new structure, the source region and the channel are located in the bottom of the trench; thedrain region is located in the top of the trench sidewall; the dirft region presents a vertical shape.By researching the basic characteristics with the Medici software, the RF VDR LDMOS caneffectively reduce the size of the device and the on-resistance in comparison with theconventional device. Using the RIE and the STI technologies, two CMOS-compatible processesare developed to manufacture the RF VDR bulk LDMOS. The simulation results show thatthese two processes provide the cost-consumption and high-efficiency methods for fabricatingthe RF VDR LDMOS. |
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