Research And Design Of Analog Baseband Circuits For UHF RFID Direct-conversion Receivers

Compared to traditional magnetic cards, bar codes and IC card technology, the radio frequencyidentification (RFID) has the characteristics of non-contact, fast reading speed, reusable, largememory capacity, safety and reliability. It is widely used in intelligent transportation, animalidentification, industrial logistics, container identification, electronic tickets, identity cards andother fields. In accordance with the analog baseband circuit module of UHF RFID (UHF RadioFrequency Identification) direct conversion receiver, we do research deeply in this paper.Firstly, this paper compares and analyzes several commonly used wireless receiverarchitectures, in accordance with some documents; it shows the analog baseband circuit moduleperformances of the UHF RFID direct conversion receiver. And the analog baseband circuit moduleincludes a low-pass filter, a programmable gain amplifier and DC offset cancellation circuits.Then, there is some research on the types and structures of the filter in this paper, based on thechannel bandwidth requirements for UHF RFID direct conversion receivers we design an adjustabledifferential low-pass filter,on the cutoff frequency of480Hz~1.68MHz to control the resistance byswitch. The design allows the receivers for processing the signal of a variety of differenttransmission rates.Thirdly, this thesis introduces the basic situation of the programmable gain amplifiers, anddesigns a programmable gain amplifier what uses the resistor feedback structure with a fullydifferential folded cascode amplifier as core op-amp linked with fixed gain amplifier. The designachieves gain range of0~48dB, gain accuracy of1dB and gain error <0.05dB. PGA’s accuracy, gainrange and noise performance can meet the requirements of the direct conversion receiver.The output of the mixer with a large DC offset in the direct conversion receiver, in order toenable the receiver to work properly, the DCOC (DC offset cancellation) circuit uses a DC offsetcomponent of the extracted signal to eliminate the DC offset by the negative feedback.Finally, the layout of the various modules is implemented in SMIC0.18μm CMOS1P6Mmixed signal process, and this design extracts the layout parasitic parameters after simulation,shows the results of the post-simulation. And all results are in line with the design indexes.