The Research And Development Of Embedded Processor Debug System Based On SOC

With the continuous development of system-on-chip (SOC) technology and continuousimprovemet ofprocessing capability of embedded systems.32-bit processor IP core has beenwidely used in design and development of SOC and SOPC.In many embedded proces-sors.Specific instruction set processor (ASIP, application Specific instruction processor) de-sign is a research hot spots of embedded systems over the years. Because it combines manyadvanced design methods and techniques in the microprocessor. at the same time Shortenthe development time and meet the functional of embedded systems.But the complexity ofusing the the ASIP design of embedded systems development and design difficulty will alsocontinue to increase.Put forward new requirements for the design and development of em-bedded systems.So debugging is becoming increasingly important in ASIP development. Withthe emergence of OCD(On Chip Debugging:chip debugging) debug mode and SOC technol-ogyCompletely changed the traditional emulator plus programmer debugging method.Thisapproach can improve the overall efficiency of debugging.In this paper, first of all,OpenriscCPU as embedded processor model.I have added some peripheral interface in the CPU to de-sign a SOC minimum system.After in-depth study of the the SOC design concept and JTAGdebug principle,using hardware and software co-design methodology,making full advantageof the reusability of SOC and FPGA programmable, With on-chip bus technology write bymyself SOC embedded processor debug interface IP core in SOC system.We can easilydebug of embedded processor and embedded software debugging by the IP core. We candebuge SoC hardware embedded software by using this debug mode.We can use JTAG modeto download Linux system of ASIP in Linux system.