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Design And Vetification System Based On H.264High Definition Encoder

Posted on:2014-01-16Degree:MasterType:Thesis
Country:ChinaCandidate:S W WangFull Text:PDF
GTID:2248330398459388Subject:Integrated circuit design
Abstract/Summary:PDF Full Text Request
H.264is a new generation of video coding standard developed by ISO/IEC and ITU. Compared with the MPEG video compression standard, in the same image quality, can greatly improve the compression ratio. This makes the H.264has been widely used in real-time video communications, radio and television, video storage and playing fields.As the video coding standard is more advanced at present, H.264has high compression efficiency, high degree of complex coding algorithm, simply relying on software implementation is very difficult to achieve real-time encoding of high-definition video codec algorithm, need for hardware acceleration on, achieve real-time encoding of high-definition video frequency.In this paper, the design and implementation of H.264HD encoder system design method based on collaborative software and hardware, and set up the FPGA system verification platform for the prototype of H.264HD encoder system.Design of H.264high-definition coder consists of software, hardware and storage. Connection between each part through the bus, between the software and hardware, software and memory are connected through the APB bus, and between hardware and memory are connected by AXI bus. Simulation is carried out by establishing a simulation system of H.264HD coding system function and performance, using the CRV method to improve the coverage verification function. The simulation results show that the encoder system able to code the32fps frame image frames to1024X768, fully meet the requirements of real-time encoding.Using H.264HD encoder FPGA verification system is Xilinx virtex-6FPGA.32bits microprocessor MicroBIaze core software running on an embedded programmable, out-of-core on-chip BRAM to replace and linked to the MicroBlaze soft core by using PLB bus, hardware part and software part and the hardware part and external interconnection interconnection by using AMBA bus to customize the form of IP provided by Xilinx IPIF to hang to the PLB bus, so as to realize the software, hardware and external Internet, implements the FPGA prototype verification environment. The Xilinx embedded development system EDK to generate the driving function of the corresponding, according to the design of driving function to improve FPGA software. Xilinx ISE comes with the tools of XST synthesis, placement and routing, generating a binary file download and download it to the FPGA, based on the Xilinx SDK hardware and software collaborative simulation. The result shows that FPGA code to generate results with X264software reference model coding the same results, so as to achieve the purpose of complete H.264HD coding system and FPGA prototype verification.
Keywords/Search Tags:H.264high definition encoder, Hardware software partitioning, Hardwaresoftware collaborative simulation environment, FPGA
PDF Full Text Request
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