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Research And Implementation Of LDPC Decoding Algorithm

Posted on:2014-01-05Degree:MasterType:Thesis
Country:ChinaCandidate:Y L MuFull Text:PDF
GTID:2248330398970573Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
As the vigorous promotion of3G, current wireless communications show great interests in the key technologies of4G. However, the typical presentation3GPP has not agreed on the specific technologies. Moreover, in the channel coding area, LDPC (Low-density parity-check) codes have a remarkable capacity-approaching performance with iterative decoding over AWGN (Additive White Gaussian Noise) channel, and have been adopted as the forward error correction technique by many high speed transmission technologies, such as DVB-S2. On the basis of national project, the thesis focuses on the research and implementation of LDPC decoding algorithm, the research concerns in this thesis are as follows:Based on the theoretical analysis of LDPC decoding algorithm, the thesis chooses UMP BP-Based (Uniformly Most Powerful Belief Propagation) decoding algorithm as the final decoding algorithm used on the verification platform. UMP BP-Based decoding algorithm can achieve performance which is very close to the BP algorithm, while the computational complexity and memory requirement are greatly reduced. According to the structure of Block LDPC the thesis proposed the quasi parallel realization structure, in order to achieve higher throughput the thesis optimized the common components of parallel decoding structure for two different code words at the same time and also two node information in the same address. The FPGA implementation results based on Xilinx Virtex-5show that the irregular LDPC decoder can achieve the performance requirements of IMT-Advanced TDD system. Moreover, the proposed design of LDPC decoder is easy to be implemented, updated and also extensible. Then the thesis focused on the combination of LDPC codes and high order coded modulation system especially the BICM (Bit-Interleaved Coded Modulation) system, which can achieve higher capacity and system spectrum efficiency. Finally, the thesis proposed an equivalent channel model for hard-decision feedback and soft-decision feedback iterative decoding system. It is proved in the literature that by using the simplified method, the transmitter only considering all-zeros codeword suffices to elaborate the error performance compared with the entire encode-decode system. Simulation results show that conventional LDPC coded BICM-ID (Bit-Interleaved Coded Modulation-Iterative Decoding) system and the simplified all-zeros model have the same expected decoder behavior. The proposed technique can also be extended to any communication systems based on linear code and binary iterative decoder, which can bring about low complexity implementation during the simulation.
Keywords/Search Tags:IMT-Advanced, LDPC, UMP-BP Based decodingalgorithm, FPGA, BICM
PDF Full Text Request
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