The Design Of Real-time Correlation Superposition Based On DSP

Real-time correlator-stacker is the essential equipment in controllable epicentre of seismic exploration, its main function is to record the seismic signals and the source of the scanning signal in real-time acquisition-related scene superposition, thus can be available seismic data. Real-time correlation has the two main objectives:one is to get the the seismic profiles in the scene, and the other is for data compression, which reduces the volume of data and improves data transmission efficiency of storage. Superposition and the main function is to control noise. Related stack processing is a typical digital signal processing, multi-channel data is great, therefore relevant measure superimposed on one of the important indicators is real-time or data throughput. In the actual multi-channel seismic exploration, the real-time requirements are not strict sense, as long as the guarantee that the next shot records prior to the arrival of a gun can present the records will be disposed of. Then most concerned about is the data throughput, in a given time can be completed within the required computation. Because multiple tremendous amount of relevant data, so the data throughput is related modules of the most important indicators. It represents the correlator data processing capabilities. Moreover, the real-time correlation superimposed on the design, but also to choose the hardware, It represents the machine’s computational speed and cost, volume and other economic indicators. How to use the appropriate hardware to receive the maximum data throughput of the apparatus has been a goal pursued by developers.Seismic signals in the data processing, decisions in data processing capacity of the two factors are the computational speed of hardware and software algorithms, so complete real-time correlation stack module design technology and key focus is to choose a suitable algorithm and hardware. In this paper, a collection of reading the literature on the basis of the relevant stack algorithm theory, focusing on algorithms for the calculation of comparative analysis, on this basis, an improved algorithm for Construction of the relevant stack of hardware platform and completed verification of the algorithm. The main work can be summed up as follows: Expounded on the basic signal theory, the cycle of correlation and linear relationship. Research related to the realization of the method, time domain correlation algorithm and frequency domain correlation algorithm, which frequency domain correlation algorithm is divided into direct and FFT subparagraph FFT.Studying the general approach of noise control. Noise control noise is composed of two parts, which are the main editing and noise reduction. Noise editing methods can be divided into clamp, fully zero, and the clamp and the filling is combined; Editor noise is the core noise detection. According to statistical probability of the basic principles of analysis of real-time correlation superposition of two commonly used for noise detection methods:Detection range and slope detection, on this basis, focuses on the signal amplitude and according to the slope of the statistical average volume of joint noise detection method. Reduce noise in the way, namely the direct vertical stacking, Overall weighted superposition of vertical-reverse power standardized and weighted sub-vertical superposition, according to the mathematical statistics and least squares method is the principle of these methods of Mathematics.Studying of the time-domain and frequency-domain correlation related to the choice of algorithm, frequency-domain correlation algorithm relates to the signal FFT transform, so from FFT recursive decomposition, for the establishment of the FFT frequency difference equations, recursive obtained various FFT computation of the number, select a suitable FFT algorithm--based-2FFT. Based on this analysis and comparison of the three correlation algorithm complexity. Then on the frequency domain related to the operation of an improved method--Hartly transform operations to be achieved. The algorithm used for data related to complex operations can be avoided, thus reducing the amount of computation. After analysis of the Hartly transform related operations computation size.In the hardware realization of the real-time correlator-stacker, building a TMS320C6713B as the core processor, with CPLD, SRMA, SDRAM, Flash, EZ-USB FX2and other devices related stack system hardware architecture platform. Among them, CPLD is to complete the seismic data acquisition and the achievement level of+5V and+3.3V device-level data between devices communications functions. SRAM is used to store the input signal and seismic records scanning signal processing after the end of the stored data processing; SDRAM for the implementation of procedures and temporary data; Flash Memory storage for the FFT is cosine tables and procedures; USB2.0host communications interface for data transmission system and the realization of PC communications, complete PC uploads/downloads data collection, code procedures, and other functions.Studying the limitations analysis of correlation and noise editorial operations on the basis of TMS320C6713B. A theoretical analysis of the1000record for the length of16k, scanning signal of the length of12K DHT-FFT seismic data in accordance with the program long sequence above the relevant time and noise editorial operations and the number of estimated time.Studying the realization of related procedures in DSP for a measured the seismic signals associated computational time, it is associated with a theoretical calculation of the time were compared. Experimental results proved to be reasonable, then analyzing the need for improvement. After describing the testing procedures encountered some problems and solutions.The final article of this paper summarizes research, a summary of the research phase of the work accomplished, that also need to examine and improve the local, and after further in-depth study of some ideas.