Research And Design Of Intelligent Traffic Monitoring Front-end System Based On FPGA

With the continuing development of the social economy, the continuingimprovement of the traffic density, the traffic problems of the city is more and moreserious, rely on human coordination and monitoring has been unable to meet the need,intelligent transportation system has a significant role to improve transport efficiency,ease traffic congestion, and therefore catchs more and more attention. This thesis studyand design the front-end of intelligent traffic monitoring system based on FPGA. Thesisuse the Altera Corporation Cyclone IV series chip, achieve the function of real-timeprocessing of the image data in the FPGA. This thesis contains the following two mainareas of work:1, In the traffic image processing aspects. First, in order to improve the accuracy ofthe following traffic image processing, using the characteristics of the traffic image,designed image noise reduction and enhanced pre-treatment. Secondly, use the rapidchanges in the characteristics of traffic environment, in order to achieve the purpose ofmore quickly and accurately detect moving vehicles, improve the mean backgroundmodeling algorithm based on simulation analysis traditional moving target detectionalgorithm. Thirdly, in order to improve the accuracy of the subsequent traffic parameterdetection, not only use mathematical morphology to eliminate isolated noise points, anddesign a two-color space information complementary shadow suppression algorithmthat to suppress the shadow of the movement of vehicles. Finally, this thesis design thetraffic flow, the lane occupancy and retrograde detection algorithm that can detect trafficconditions on the road in real time.2, to achieve the system based on FPGA. First, this thesis design the I2C module toconfigure the image sensor which can capture the correct image data. Secondly, in orderto cache image data, and make other function modules have a unified interface to readand write image data, this thesis design the SDR SDRAM controller. Thirdly, accordingto the previous simulation of traffic image processing, and the structural characteristicsof FPGA, this thesis make parallel optimization for the traffic image preprocessing,moving vehicle detection and shadow suppression of vehicles modules. Finally, in order to test the processing result, this thesis design the VGA controller which make theimage data to display on the monitor that supports VGA interface.All the video image processing algorithms are simulation verification withMATLAB, and are implemented in FPGA. Parameter settings often need to be adjusteddue to traffic monitoring, and high reliability requirements of the system, so most of thefunctional modules are written in Verilog, and modules are designed can be usedindependently. The system has been tested and verify, within the specified time andefficient completion of work, and the system can detect the traffic flow, the laneoccupancy and retrograde detection in real time.