Design Of Integrated Analog Front-end And Data Acquisition System For Multi-beam Imaging Sonar

Multi-beam imaging sonar is a underwater detecting imaging equipment which iscapable of efficiently detecting the seafloor landform and real-time high-precision imaging.Since its ability to display underwater topography and targets intuitively, multi-beam sonarhas a broad development needs. Along with the excellent performance, the need for timelyacquisition and processing plenty of real-time data has placed enormous demands on the partof the receiver and acquisition system’s performance. Based on the urgent needs fordeveloping underwater imaging sonar system, this dissertation researches the circuits ofreceiver and data acquisition system, designs and implements these circuits.In this dissertation, the receiver circuit of imaging sonar system is researched anddesigned firstly. There are a huge amount of data and large number of receiving channels, soit’s difficult for using traditional scheme of the receiver. To solving this problem, integratedanalog front-end chip, which is widely utilized in the field of medical imaging, is introducedas a bridge between the receiving and acquisition system. Based on integrated analogfront-end, receiving system composed of band-pass filter circuit, controllable gain amplifyingcircuit, analog front-end circuit is designed and debugging. In the process of designing, thenoise characteristics of the receiver are studied to ensure low noise and select appropriatedevice.Multi-channel data acquisition system is designed to meet the requirements of data’shigh-speed and real-time acquisition and transmission the multi-beam imaging sonar. It isconsist of AD conversion module in the analog front-end chip, FPGA core control circuit,DAC gain control circuit, DDR2SDRAM data storage circuit and high-speed transceiverinterface circuit. Serial LVDS signal from the analog front-end is transmitted to FPGA, thenthe high-speed data will be stored in the DDR2SDRAM and uploaded by the transceiver.The PCB design method in the circuit of analog-digital hybrid and presence of high-speeddigital signal is discussed in the dissertation.At last, based on the circuit design of multi-channel data acquisition system, the designand debugging of the control logic of the acquisition is completed. In the environment of thesoftware Quartus II, the Verilog HDL language and IP core module is used in designing theFPGA control logic which is consist of SPI control of analog front-end, DDR2SDRAM controller, digital-to-analog conversion control. Besides, all the timing simulation andfunctional verification of the FPGA control logic is completed in the software Modelsim.