The Design Of Parallel Multi-Channel Ultrasonic Testing System Based On FPGA

At present, ultrasonic detection, as one of the important Non-Destructive flaw Testing(NDT) has been widely used in the national economy such as railway transportation, petrochemical industry, mechanical manufacturing, National Defence Industry etc, and getting more and more wide. The implementation of the traditional ultrasonic detection system usually adopts MCU, DSP, or ARM+DSP architecture. With the demand of the industrial increasing, the traditional system detection equipment is difficult to meet the requirement of the real-time, sensitivity, and degree of automation in the modern detecting project.This paper proposes a system design scheme based on’FPGA+IPC(Industrial Personal Computer)’. In this design, the subsystem of FPGA implements of transmitting and receiving ultrasonic signal, gain adjustment and logic controlling etc. Using FPGA’s high-speed and parallel processing characteristics, rich logical resources, it is effectively to implement the function high-speed signal collection and digital signal processing in the multi-channel system. At the same time, it will greatly improving the flexibility of the detection system by usmg FPGA’s reconfigurable on-line characteristics, to implement the module of FIR filter with dynamic coefficient. The transmission of data and commands between FPGA and IPC uses the gigabit Ethernet, it can real-time transmit the mass ultrasonic echo data to IPC.In the system of IPC, it very convenient of using the VC tool integrated QT library to implement the ultrasonic echo data storage, waveform display and user interface. At the same time, we can also use the powerful handling capacity of IPC to get spectral analysis, WT (Wavelet Transform) and some other more complex digital processing with the Echo data. And further To enhance the accuracy and degree of Intelligent of the detection system.