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High Performance JPEG Encoder Design And OVM Verification

Posted on:2014-07-28Degree:MasterType:Thesis
Country:ChinaCandidate:Y WangFull Text:PDF
GTID:2268330401465375Subject:Software engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of digital multimedia technology, the applications ofimage, audio and other multimedia are more widely, require the transmission of datawithin the unit time becomes larger.Therefore, how to reduce the cost of thetransmission time and storage space, become a very important research direction. JPEGencoding technology has been widely used in image processing.Firstly this dissertation studies the JPEG encoder principle, architecture andimplementation method. According to the design requirement of the actual work, inorder to reduce the demand for bandwidth of the system, this dissertation explorer a wayto implement matrix transpose based on counter splitting recombinant algorithm. Byincreasing a set of the DCT processing unit to realize JPEG encoder pipeline operations,the overall performances of the design improve efficiently. Compareing with the normalparallel transposed matrix processing algorithm, save circuit area while reducing thecircuit complexity.Based on the research of Open Verification Methodology (OVM), thisdissertation explorer its basis and advantage, especially in features of advancedmodeling based on the System Verilog language. Accoring to requirement of system onchip with integrated design and verification, with the consideration of high efficiency,reliability, and significantly shorten cost verification time, the research indicates thatOVM has advantage in the incentive constraint random, the coverage statistics analysis,Assertion Verification, the object-oriented method, this help to contribute the validationtransaction level and improve reusability of verification. Finally this dissertation takesOVM as verification approach.Based on the above research results, this dissertation present a complete designand verification scheme to implement image compressed with pipeline. The schemerealizes software-hardware co-design, improves the overall performance of the designeffectively, reduces the system bandwidth need, and ensures the correctness andintegrity of design, especially in shorting verification time to meet market. Besides, as acase in the successful implementation of advanced verification method, this design accumulated experience for the follow-up design verification, established the goodfoundation.
Keywords/Search Tags:JPEG, image compression, DCT, OVM, pipelining
PDF Full Text Request
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