Research And Key Modules Implementation By FPGA Of PUSCH In LTE System

With the issuance of4G licenses in China, LTE will become one of the mainstreams of the domestic mobile communication standard to cope with the increasing demand of data communication service. It has the advantages of higher data transmission rate, lower latency and larger system capacity at the same time much higher spectrum efficiency and larger coverage and become one of the research focuses in the field of mobile communication. As one of the most important channel in LTE uplink physical layer, PUSCH mainly transmit UE data and control information. So it has important practical value and significance to study and implement some key modules on PUSCH in LTE system.There are two important technologies from baseband signals to intermediate frequency signals in PUSCH processing process:OFDM technology and digital up converter and digital down converter. As the key technology, the former use the variable points FFT/IFFT to realize the modulation and demodulation in different bandwidths. As a bridge of communication between the radio frequency signal and the baseband signal, the latter completes the conversion of rate and spectrum shifting of20MHz system bandwidth through the non aliasing interpolation and decimation to meet the requirements of DSP processing speed. Based on the two technologies, this paper mainly studies the variable point FFT and DDC modules and implements by Field Programmable Gate Array.In this paper, combined with the actual project of company, the main work is as follows:1、Referring to the relevant protocol documents and technical reports of3GPP and combined with related meeting document from main communication company, designing the modules of transmitter and receiver by the modular method of LTE system baseband processing and establishing Matlab simulation platform of PUSCH.2、Researching, analysis and comparing the algorithm for the realization of variable bandwidth of OFDM modulation and demodulation technology by variable point FFT/IFFT, and on this basis, choosing WFTA and mixed radix algorithm. Through the modular design method to realize the reuse of modules and using verilog to design the whole variable point system of128points,1024points and2048points. Then using Modelsim to simulate and comparing with the theoretical results of Matlab, obtaining the EVM of three kinds of points were less than-40dB.The test results show that it can realize variable point FFT in real time and can meet the design requirements about precision, so it has certain reference and practical value.3、Discussing the basic theory of DDC, namely the multi-rate signal processing theory and according to the actual project requirements to design and simulate digital down converter in20MHz system bandwidth. Then realizing it by FPGA and giving out the simulation and test results.