AES And RSA Encryption Hybrid System Design Based On FPGA

Currently, the world has entered the information time, computer network has been rapid development, related to our aspects of social lifes. network has brought us convenience, but also make us facing many problems, one of the most prominent problem is the information security, all kinds of confidential information such as:national security, political, economic and corporate secrets and private information, so information security is particularly prominent. Therefore, many countries have information security research in this field of work. Information security technology, encryption technology is especially related to the country’s critical infrastructure, the core part of someone else’s technology may not be introduced, so the study of information security and cryptography is very important. In China, information security research and practice started relatively late, compared with developed countries, there is a large gap,so information security issues become more prominent.In this paper, first introduces the knowledge of the relevant aspects of cryptography, introduced two AES and RSA encryption algorithms and their mathematical basis, the overall structure and different implementations; against AES algorithm implemented in Sbox analyzed, and ultimately determine the use find way to store the table, and the RSA algorithm operation speed is too slow problem, an improved scheme, and the use of hardware implementation of the improved algorithm, the realization of their way to compare and choose, determine the ease of implementation on FPGA; analysis the advantages and disadvantages of symmetric cryptography and asymmetric cryptography, determined using two encryption algorithms AES and RSA encryption algorithm to achieve, RSA encryption and decryption module and decrypt digital signatures, AES encryption key functions; AES encryption module is the core part, to complete the data encryption capabilities. Application Verilog VHDL language and each module function simulation, use Xinlix’s ISE software through FPGA simulation results can be drawn in line with the actual encryption of the program requirements; using Mentor’s Modelsim simulation software verification, use the device as Xilinx Inc. The Virtex6-XC6VLX240T, proven to function correctly, meet the design requirements.Finally, the paper summarized and discussed, innovation thesis work is mainly reflected in:the use of hybrid encryption way, making the system more secure encryption; RSA algorithm is too slow for the problem, an improved Montgomery algorithm, making RSA operations more faster, which is convenient in hardware design.