Removal Of Volatile Impurities From Silicon By Vacuum Directional Solidification And Its Application

Polycrystalline silicon is the basic material for photovoltaic power generation. Due to its low cost, simple process, less investment in equipment and other advantages, physical metallurgy method will gradually replace the improved Siemens method and fluidized bed method to become the main technology of polycrystalline silicon material production.Vacuum directional solidification, as the core technology for the method of metallurgical process, can realize polysilicon purification and ingot casting of polycrystalline silicon. However, certain breakthrough techniques haven’t been achieved for vacuum directional solidification, contributing to the fact that the potential of polysilicon preparation of this method hasn’t been brought to its full play.Dynamics researches on the removal of volatile impurities with the method of vacuum directional solidification have been conducted in this paper according to the segregation principle of vacuum surface volatilization and directional solidification. And a distribution mathematical model suitble for removing volatile impurities in silicon for industrialized vacuum directional solidification has been derived and testified. The influence of melting temperature, solid-liquid phase boundary layer thickness and solidification rate on the effctive segration coefficient of volatile impurities has been thorougly investigated. Experimental results demonstrate that both the rise of melting temperature and decreasing thickness of solid-liquid boundary layer can result in decreasing effective segregation coefficient of volatile impurities in silicon, however, the reduction is modest and its decreasing tendency gradually slows down. And the reducing solidification rate will lead to decreasing effective segregation coefficient of impurities, this effect determines the segregation effect of volatile impurities.Combined with the characteristics of vacuum directional solidification ingot casting furnace, drop-down rate of insulation board was selected as the object to be improved during the proess of polysilicon purification in directional solidification ingot furnace.Direct relationship between silicon ingot height and effective segregation coefficient was deduced according to experimental results. Thus the two factors of impurity removal and crystal growth were considered, and two sets of process including ingot furnace refining and ingot purification were obtained. Testing of Impurity content, minority carrier lifetime, resistivity, etc. was conducetd in this paper using inductively coupled plasma emission spectrometer (ICP-OES), WT2000 surface scanning minority carrier lifetime tester, four probe method of measuring. For silicon ingots produced by the purification process, the contents of copper and phosphorus impurities are lower than 0.5ppmw and 3ppmw, respectively. And the contents of other metal impurities are all lower than the detection values. Average value of Jane life of the samples is distributed in the range of 0.61 μs～0.75μs. Electrical resistivity of samples located in the middle part is distributed in the range of 0.2Ω·cm～0.6Ω·cm, and electrical resistivity of those located on the edge of silicon ingot is distributed in the range of 0.15Ω· cm 0.5Ω·cm.As for the silicon ingots produced by the process in which purification and ingot casting are conducted at the same time, the contents of iron and titanium impurities are both lower than the values detected by the instrument. And the content of metal impurities in silicon located in other parts of the ingots is generally lower than lppmw. Average value of Jane life of the samples is distributed in the range of 5.851 μs～6.466μs. Electrical resistivity of samples located in the middle part are distributed in the range of 0.25Ω·cm～0.45Ω·cm, while electrical resistivity of those located on the edge part is distributed in the range of 0.15Ω·cm-0.5Ω·cm.In addition, silicon ingot production cutting position was calculated according to the formula of impurity distribution. Compared with the original cutting position, an improved yield of 3.5-4% for silicon ingot and an improved yield of 15～20kg per furnace can be achieved according to the calculated cutting position.