The Design Of BUCK DC-DC Chip Based On Peak Current And PWM Control Mode

In today’s consumer market, people’s demand for portable devices becomeshigher and higher, and the man-carried device updates faster and faster. While thepower has been act as a "heart" role among all of power electronic products. Andswitching power supply, with its simple peripheral circuit, small volume and highefficiency has been applied widely as power equipment. Follow with the pace ofportable system designers to reduce product size constantly, the power IC engineersturn the design focus to utilizing smaller off-chip inductance and ceramic capacitorto achieve higher switching frequency, thus improve the power efficiency. Based onthe scientific research project from the lab of Institute of Microelectronics,Optoelectronics and System on a chip in Xiangtan university collaboration withShanghai Yupin company “Research on high performance step-down switching powersupply”, a kind of monolithic synchronous buck converter has been analyzed anddesigned，it need just a small number of external capacitance and inductancecomponents, can achieve the voltage step-down function. It has extensive marketprospect in the distributed power supply system and portable products.Firstly, the method steps is described that how to judge the stability of system byemploying the dynamic analysis of switching power, then the small signal design ofswitching power based on the peak current and PWM control mode is discussedseriously, the distribution of zeros and poles from their transfer function has beenstudied carefully to ensure the stability of entirety power system loop circuit and thecorrectness of the chosen scheme. What’s more, series of circuits design andsimulation have been done aiming at the six key modules on chip. Finally the overallcircuit was simulated to get the detail indicators including output ripple voltage, lineregulation, load regulation and efficiency. Integrated MOS switching transistor andrectifier transistor with the internal resistance of200mΩ, the DC-DC converter chipcan provide continuous load current whose maximum value is2A, at the wide inputrange of5-18V, at the same time, the peak current loop control pulse widthmodulation mode is in favor of fast load response and cycle-by-cycle over currentprotection. In addition, the power chip has the advantages of both340kHz and100kHz frequency conversion function, under-voltage, over-voltage protection and overtemperature protection and so on. In addition, to smooth start running of chips we introduce the Soft-Start mechanisms; and applying the slope compensation to avoidthe sub-harmonic oscillation phenomenon occur when the duty cycle is greater than50%; while, time of dead region control, which is used to achieve synchronousrectification technology, depends on the staggered delay from inverter chain, etc. Sothe introduction of these technologies greatly enhanced the reliability of the designedBUCK DC-DC system.In this paper, the main innovation points exist in the detail design of each circuitmodule:1) The error amplifier which decides the system bandwidth, has beendesigned to resist on the impact of the main pole change with temperature;2) Itprovides gate voltage for depletion MOSFET by taking advantage of the reverse biasof zener diode, instead of a current-limiting step-down function from JFET, whichprovides a relatively stable working voltage for internal adjustment module, makes upfor the defect of B50D process without JFET tube;3) Based on traditional Brokawbandgap module, capacitance between VX node to GND node is beneficial to thebandgap loop phase margin improvement of;4) In the variable frequency oscillator,the capacitance added in digital output part is helpful to realize the duty ratio control.Limited by the reason of time and school test equipment, the works including circuittesting and chip error-detection still need to be continued. The efficiency of PWMmodulation method under the condition of light load is low, the internal adjustmentcircuit occupy high temperature coefficient and the accuracy of oscillator capacitor iseasy to be affected by the process, all of above problems are the deficiency of the chipdesign.Based on Suzhou MXIC standard0.5μm BCD process, the Cadence simulationtools was used for each module and the overall loop simulation, validation and layoutdesign, including the whole chip ESD protection design. Simulation to get the systemverification and whole circuit simulation results can reach the design requirements,and the highest power efficiency can reach93%, which verifies the correctness andfeasibility of the system scheme and design thinking, and the chip has been taped-out.