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The Rearch Of Capacitor Charging For Power Factor Correction Based On Capacitance Discharging Stud Welding

Posted on:2015-06-26Degree:MasterType:Thesis
Country:ChinaCandidate:Z G DuanFull Text:PDF
GTID:2272330452953375Subject:Mechanical engineering
Abstract/Summary:PDF Full Text Request
Capacitance discharge stud welding is a simple and efficient welding method,Because of its short welding time and small thermal deformation, it is widely used inthin iron sheet stud welding and it uses capacitor with high-capacity as the energystorage component. In the charging process, capacitor’s voltage is near zero at thebeginning of the process, when the voltage reaches the target value, the chargingcurrent is zero and the system stops charging the capacitor. The correct power supplytopologies can achieve a steady state and every cycle the amount the current ramps upby in the on-time is exactly equal to the amount the current ramps down by during theoff-time.The steady state of the system needs the output capacitor reaches the targetvoltage rapidly. Because the capacitor’s initial voltage is low and the process is toolong, which make the design of power factor correction and the options of controlparameters special difficulies.According to the characteristics of capacitor charging process, it is veryimportant to choose a suitable method for the power factor correction.In this paper,weuse the peak inductor current discontinuous control mode that the primary inductorcurrent begins to rise from zero with a certain slope, when it reaches the sinusoidalreference the controller turns off the PWM which makes the inductor current drops tozero, and the controller is forced into a process wait state to ensure the energy of thesecondary will be transferred to the capacitive load completely. In next charge cyclethe primary inductor current starts from zero and so on. This mode can guarantees thatin each switching cycle the amount the current ramps up by in the on-time is exactlyequal to the amount the current ramps down by during the off-time,which makes theconverter achieve the steady state and avoid the low initial voltage makes an effect onthe power factor correction; the peak inductor current envelopes the primarysinusoidal reference and the system achieves good power factor.We choose flyback converter as the topology, it modelled as a loss free resistorwhen operated in discontinuous current mode and we give the detailed derivation. Theflyback converter which operated in discontinuous current mode is simulated byPSIM. Based on the PSIM simulation,we make the design of flyback converterincluding the transformer design;the selection of MOSFET,output rectifier diode,rectifier bridge and the input filter capacitor;the snubber network design and so on. As the shortcomings of analog control, we make improvement for digital control:including the DSP28335minimum system design, the CPLD minimum system design,sample circuit design and software design. Using the digital control avoids theshortcomings of analog control system, the system has a good power factor.
Keywords/Search Tags:power factor correction, capacitor charging, pure capacitive load, flybackconverter, digital control
PDF Full Text Request
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