| Because of the expansion of the domestic semiconductor market during the recent years, there is great development potential of power management chips for device communication. This paper proposed a Buck DC-DC converter of high performance, which is applied for HART protocol in device communication. The converter can achieve the function of voltage-current conversion, and make the output voltage dynamically adjust with the load current.In this paper, the process of system level design is discussed in detail, in order to propose the reasonable system architecture. Linearization technique is used to transform the model of switched mode power supply to small signal model. Compensation network is rationally designed to ensure the system stability.The proposed chip has a feature of high power density, because power MOSFET is integrated. Synchronous rectification can be achieved. The Buck converter works at conditions of6V-30V input voltage and4mA-25mA load current, with peak-current-mode control. The switching frequency can be adjusted by an off-chip resistor. Sub-harmonic oscillations are avoided by the self-adaptive slope compensation. Protection modules are also integrated to ensure the safety of working environment.This paper proposed several methods to improve the efficiency. Advanced peak current sampling method is introduced to reduce the conduction loss. An appropriate critical load is chosen for PWM/PSM dual-mode automatic switching. The efficiency is not lower than80%within the load range, and the highest efficiency can reach94.3%.The chip is manufactured by the process of SLIC0.8μm/40V350A/600A BiCMOS. The gate of power MOSFET can withstand high voltage of30V. In this way, the gate drive voltage can be very high to lower the conduction resistor, making the area much smaller. The area of layout is1.65mm×1.50mm, and the package type is SOP-16. The simulation and measurement results are provided, and the chip is in tape-out for revision now. |
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