| With the explosive growth of portable electronic products in recent years, the market of power manager also got rapid growth, meanwhile, higher performances of power manger were requested, including higher efficiency, lower power consumption and higher reliability. According to these requirements, a high efficiency synchronous step down DC-DC converter was analyzed and proposed in this thesis.At first, the topology structure and basic principle of step down DC-DC was introduced, and on the basic, the advantages and disadvantages of three classic control modes of DC-DC converter were analyzed. In order to improve efficiency, synchronous rectifier technology and the related issue was discussed. Then this thesis analyzed the power loss caused in DC-DC converter, providing basic theory for reducing power loss. Based on the requirements of chip and theories, the overall design of system was proposed at last. The mathematical model of system was established and proved to be feasibility through Matlab simulation.After completing the overall architecture of system, the realizable circuits needed to be designed further. Some key modules, such as band gap reference, error amplifier and protection circuit and so on, were designed and simulated through Hspice.Finally, circuit modules needed to be connected to as completed controller system. The whole chip was simulated in CSMC 0.5um BCD process. The results showed that the chip can provide wide output voltage range from 0.8V to 10 V, power efficiency can be as high as 95 %, the output ripple lower than 1% of output voltage, good linear regulation and load regulation. The simulation results indicated that all specifications of the chip were achieved. |
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