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The Design Of 15-5 V DC-DC Converter Integrated Circuit

Posted on:2015-10-30Degree:MasterType:Thesis
Country:ChinaCandidate:L LuoFull Text:PDF
GTID:2272330473453388Subject:Circuits and Systems
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Demands for portable devices, running on battery, have become much higher over the years. The voltage out of a battery is often determined by its chemical structure and it is usually fixed. Nevertheless, the required supply voltages for the internal circuitries of portable devices may differ from its battery supply voltages. Thus, DC-DC converters are needed to convert the supply voltages from the battery to the specified stable voltages that the internal circuitries require. In spite of this, the efficiency of the DC-DC converters over a wide load range is generally low because of power loss in the power stage and the control circuits. Therefore, the objective of this thesis is to design a high efficiency Buck Switching Converter to solve this problem.Power stage suffers from conduction loss, which lowers the efficiency of the DCDC converters. This loss is not properly characterized against efficiency. In this work, a DC model that characterizes the conduction losses of the power stage is proposed to analyze the effects of the conduction loss on the efficiency of the converters. Hence, using this model, the conduction loss can be minimized and an optimal high-efficient DC-DC converter can be derived from the model.Control circuits suffer from static loss. The amount of this loss may vary depending on the different control methods used. PWM control method is less efficient in light load condition, while the PFM perform badly in heavy load condition. Peak current-control method suffers from instability problem when the duty cycle is larger than 0.5. Therefore, this work adopts a dual-mode control method to increase the converter efficiency over a wide load range, and a wide-swing low-power V-I converters in the slope compensation circuit to avoid instability problem.The design of a high efficiency buck switching converter is implemented using conventional 0.25 μm BCD process. Simulation results show that the output efficiency achieves higher than 80% over load current from 10 to 500 mA, the ripple voltage is lower than 12 mV in PWM control method, the line regulation and the load regulation are 0.147%/V and 0.0133%/mA respectively.
Keywords/Search Tags:Buck switching converter, high efficiency, pulse-width modulation(PWM), pulse-frequency modulation(PFM), slope compensation
PDF Full Text Request
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