Researches And Designs Of Low Power Consumption LDO And High Frequency Buck Converter In Power Management Unit

With the development of semiconductor industry and wireless communication, various portable products, such as laptops and smart phones, are developed rapidly too. Power management chip with single function which will waste the limited capacity of the battery cannot satisfy the various functional requirements of the portable products anymore, and in order to meet the various power supply needs of all the modules, the power management unit is proposed. Compared to the previous single-chip power supply system, power management unit can not only maintain high conversion efficiency, but also shows many other advantages. It can provide multiple power voltages, low power consumption, with higher levels of integration. The PMU contains many functional blocks, such as LDO、DC-DC converter、charge pump、voltage reference, etc. The key work of this thesis is to design a low power consumption LDO and high frequency Buck converter, respectively.A low quiescent current output capacitor-less LDO is presented in this thesis. Firstly, this paper introduces the basic circuit structure、working principle、main performance parameters of LDO and traditional and output capacitor-less LDO’s stability and transient analysis. Secondly, LDO is integrated with many function modules, such as error amplifier、slew-rate-enhanced circuit、reference circuits, etc. All of these circuit structures and operation principles are analyzed and designed. Finally, the circuits and system are simulated based on SMIC 0.18μm CMOS standard process. Simulation results show that, the LDO regulator consumes a quiescent current of only 1.2μA at steady state. It regulates the output voltage at 1.8 V from a 2-2.8V supply voltage, with a minimum dropout voltage 100 mV at the maximum output current of 100mA.A high frequency voltage-controlled PWM/PSM dual-mode Buck converter, which has the function of soft start, under voltage lockout protection, over temperature protection and over current protection, is presented in this paper. It is able to regulate the output voltage at 1.2V from a 1.6～3V supply voltage for the maximum output current of 500mA.The maximum switching frequency of Buck converter is 20 MHz. This paper introduces the basic circuit structure, working principle, main performance parameters, control mode and modulation mode of Buck converter. This converter contains many functional blocks, such as error amplifier、PWM comparator、pulse skipping modulation circuit、PWM/PSM selector circuit、zero current detecting circuit, etc. All these circuits and system are simulated based on SMIC 0.18μm CMOS standard process. Simulation results show that, the output ripple of Buck converter is lower than 15 mV, and the peak conversion efficiency is about 85%.