Research And Design Of A Low Quiescent Power Consumption Multimode Synchronous BUCK Dc/Dc Converter

As an indispensable component of all the electronic equipment, the property of the power lays a great impact on the performance of the system such as technical indicators and reliability. There also exists a growing demand for DC/DC converters embedded in communication terminal devices, personal digital products, et al, while the requirements of their performance become increasingly stringent. With the rapid improvement of microelectronics, semiconductor integrated circuit technology and other related disciplines, the development of low power, high efficiency DC/DC converter has entered a new stage.This paper mainly focuses on the research on step down DC/DC switching power management IC, and design of a low power, multi-mode, step down DC/DC converter. PWM peak current mode and synchronous rectification are adopted to achieve high output voltage accuracy and high efficiency. Analog regulator and digital regulators are designed separately to solve the cross interference exists in the mixed IC like the proposed converter. The optional power supply mechanism reduces the input current pulled from the input source which in turn lower the power loss on the chip. Three operating types including Burst Mode, Pulse Skipping Mode and Forced Continuous Current Mode can be selected by recognizing the DC voltage level of the related pin thus the selection of the operating mode can be realized based on the applicant considerations which may focus on the output ripple or efficiency alternatively. Constant current charging provided by inner module makes the soft start available which can lower the voltage peak, current peak and related EMI during the startup of the system. The driving stage of the circuit is designed with adoption of bootstrap circuit in order to ensure the proper functioning of the system which is utilized by using N-channel MOSFET as switching component based on the efficiency considerations. Besides, dead time is setup properly by utilizing staggered delay and logic transmission delay structure. Therefore, the enormous instantaneous power consumption and irreversible damage to the circuit are avoided.In this paper, the author firstly introduces the development background and basic operating principles of switching power supplies after which the fundamental and emerging technologies including PWM peak current mode, synchronous rectification is analyzed. Based on the theoretical knowledge mentioned in the first two chapters, the overall architecture of the designed IC is proposed. Then the inner analog modules are designed according to the requirement of the proposed IC.The verification of the circuit is implemented by adopting simulation method using Cadence and HSPICE based on 1μm BiCMOS HV process. The results shows that the efficiency of the proposed converter is 93%, and down to 85% at light load in Burst Mode. The shutdown quiescent current is 9.6μA, and the standby current is 88μA with one channel on, 115μA with both channels on. The overall simulation result shows that all of the electrical characteristics meet the specifications.