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Research And Design Of Low-noise DC-DC Converter

Posted on:2017-02-07Degree:MasterType:Thesis
Country:ChinaCandidate:D J YangFull Text:PDF
GTID:2272330485488298Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The smart portable devices had grown fast since the 21 st century. Systems with smaller space, higher performance and lower power consumption have become the hot spot. The development of process meets the requirement, but meanwhile, the noise performance is concerned more due to the increased sensitivity of noise. The continuous increase of system’s integration has made the Power Management Unit(PMU) become the indispensable part of the SoC for its power supply diversity. The noise characteristic of PMU affects the load’s noise performance significantly. So, the design of the low noise PMU has become a trend.The output noise of DC-DC and the suppression methods are analyzed first. The sources of noise are explained and the current suppressing methods are introduced. Then, a hybrid-structure DC-DC converter is proposed for low noise power supply which consists of a Buck and a LDO in series. The Buck converter is designed in 40 nm CMOS process with the input voltage range from 1.65 V to 3.6 V, and the output voltage is 1.4 V, the typical and maximum load currents are 500 mA and 1 A respectively. The switching frequency is 2 MHz. The soft start and current limit technique, minimum duty ratio limit technique, pseudo-type III compensation technique and input voltage feedforward technique are used from the system loop’s analysis to the design and simulation of each sub-circuits. The layout is designed, the simulation and test result are presented. The results show the chip meets the requirement.Furthermore, a novel DC-DC converter structure with the simple loop structure and modulation method is proposed. It’s based on the low noise characteristic of Sigma-Delta modulation to meet the noise requirement. The whole structure and working mechanism are analyzed. The loop transfer function is verified by using the Simulink toolbox in MATLAB, and the transistor-level circuits are designed and simulated in IC615. The simulation results show that the switching harmonic noise is suppressed by 40 dB at the switching frequency of 2 MHz. This proves the new structure have great harmonic noise suppression characteristic and it’s suitable for low noise power supply applications.
Keywords/Search Tags:Low Noise, Buck, Sigma-Delta Modulation, subharmonic suppress
PDF Full Text Request
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