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Research And Implementation Of NAND Flash-based Solid-state Memory Card With High-speed PCIe Interface

Posted on:2013-07-10Degree:MasterType:Thesis
Country:ChinaCandidate:Y OuFull Text:PDF
GTID:2298330422473979Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the rapid development of the network, computing, storage, and othertechnologies, the modern world gradually goes into the world of the Internet, the data ofthe world. With more massive data-based data-intensive applications appearing in thepresent social life,there is not only the huge demand on the storage’s scale, but also thehigher request forperformance, delay, bandwidth, reliability and energy consumption.Because of the limited internal mechanism of the traditional hard disk drive, I/Obandwidth has become the main bottleneck in the large-scale storage system. Comparedwith hard disk drive, NAND Flash memory has the characteristics on the undisputedlow-price, high-performance, non-volatile and low-energy consumption. In addition,several existing transmission interface simply can not meet the demand for bandwidth,if we want to use thelarge-scale storage arrays composed of solid-state drive. On thecontrary, compared with the SAS, SATA, FC and iSCSI transmission interface, PCIehas faster bandwidth, which can fully meet the bandwidth requirements of large-scalestorage arrays.This paper focuses on the research and implementation of a high-speed NANDFlash-based solid-state memory card with PCIe interface.The contributions of thisdissertation are summarized as below:First, we study the characteristics of the internal structure and interface of NANDFlash memory chip to design a NAND Flash memory interface controller, which is ableto properly access the NAND Flash memory chips.Secondly, the current research status of NAND Flash memory controller has beendetailed in this paper.We exploittwo flash parallel access strategys, whom we use todesign NAND Flash controller respectively. The evaluation shows that4-channelstrategy gets2.1times speedup.When using the out-of-order strategy, the IO bandwidthutilization ratio of a4-die chip is achieved by at least36%up to167%of performanceimprovement.Finally, this paper studies the development trend of mainstream storagetransmission interfaces in current. Meanwhile, we analyse the transmission protocol ofPCIe bus interface and parse the transaction layer of the PCIe protocol.Wehavedesignedand implemented the DMA controller, in order to realizing the datatransmission between the host and solid state memory card. At last, we adopt DINIFPGA development board asthe platform and use samsung NAND Flash memory chipas a storage unit to implement a high-speed solid-state memory card prototype system,which is based on NAND Flash memory and PCIe1.1×4interface. The prototype hasthe total capacity of256GB, achieves700MB/s and600MB/sof the measured reading and writing performance respectively.
Keywords/Search Tags:NAND Flash memory, multi-channel, out-of-order, high-speedPCIe
PDF Full Text Request
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