FPGA-based Software System Redundancy

In this paper, it mainly introduces the design of software-based N-module redundancy system for voting architecture. Software-based redundancy for high performance, mission-critical computer system is a cost-effective solution. Because software-based redundancy can be based on the existing commercial technical device. Due to the large number of data selection and randomness,software-based system requires a programmable voter. Voting software running on the processor is generally called’Time-of-Check-to-Time-of-Use, TOCTTOU’blemish and can not bear the long duration faults.To solve these two problems, this paper presents a special-purpose voting processor and its embedded system architecture. This voter has a pair of novel instructions and hardware modules which can be scheduled by software to accelerate the execution of software and the reliability of these two problems. The system runs on FPGA platform.The result of the assessment showed that using the system can reduce the execution time and error detection code size by14%and56%respectively.Error injection experiment proved that the system in real-time and long duration error can remove TOCTTOU defections.