Study On The EFT Test Method And On-chip Protection Technique For Microprocessors

As the core of modern electronic systems, microprocessor often plays animportant role in the Electromagnetic Compatibility of electronic systems. With theprocess of integrated circuit advancing and the feature size decreasing, the operatingfrequency and integration of microprocessors get higher, supply voltage get lower. Asa result, more and more sensitive the microprocessors get to external ElectromagneticInterference. For the requirement of system designers to integrated high EMCperformance ICs, there is an urgent need of an EFT test method to measure themicroprocessors’ EFT immunity and an on-chip design technique to improve themicroprocessors’ EFT immunity. Based on this demand, the article analyzed thesystem level test method and summarized the existing transient immunity testsolutions on ICs, and the implemented a microprocessor EFT test method. Also, atrigger circuit of the corresponding on-chip protection technique to EFT is studied.The first part of the article implemented a microprocessor EFT test method.Firstly, the system level EFT test method and the interference mechanism of thesystem level EFT event to microprocessor are analyzed. After a comparison of severalexisted IC level transient pulse immunity test solutions, a microprocessor EFT testmethod is implanted. The test environment setup, test hardware design, softwaredesign and testing process are discussed in detail in this paper.The second part of the article showed a test case of this test method. Amicroprocessor chip is selected to do the test. Several test issues are summarized bythe analysis of the test results. Several failure modes and mechanism of themicroprocessors during the EFT test are studied. And the repeatability andreproducibility issue of the test results were studied experimentally.The third part of the article researched the trigger circuit of the on-chip EFTprotection structure for the microprocessors. Based on the analysis of the performancerequirements of the EFT protection circuit, and combined with a microprocessor’son-chip ESD protection structure, a new EFT trigger circuit that can take advantage ofthe on-chip ESD protection circuits is proposed to achieve the EFT on-chip protection.The solution is verified through simulation and the actual test.