Design And Implementation Of High Speed Interconnection And Decompression In SAR Real-time Imaging System Based On FPGA

SAR (Synthetic Aperture Radar) is a kind of high resolutionmicrowave radar. Becauseit can perform real-time imaging processes in spite of weather condition, SAR is playing anirreplaceable role in most walks of life. The main idea behind synthetic aperture is to makeuse of the Doppler effect caused by the relative movement between targets and the SARaircraft, and then some subsequent signal processing procedures are performed to makelarge antenna aperture so as to obtain high azimuth resolution.SAR imaging system is responsible for the signal processing from SAR original echodata to SAR images. As the amount of SAR echo data is huge and the imaging algorithm iscomplex, high quality processors is necessary to make real time processing. According tothe characters of SAR imaging technique, FPGA(Field Programmable Gate Array)can beused to implement management and control over inputs/outputsand DSP (Digital SignalProcessor) is suitable for realization of imaging algorithms.This paper mainly studies the design scheme of the FPGA-based highspeed Rapid IOinterconnect technology in real-time SAR imaging systemand the effects of the fixed pointBAQ (Block Adaptive Quantization) decompression algorithm on FPGA resource usage.Interfaces on data transmission in SAR real time imaging system are all implementedin FPGAs, protocols in which principally refer to high performance embedded interconnecttechnology Rapid IO. In this paper we design user interfaces adapted to the specificapplications in SAR real time imaging system so that application layer and the protocollayer can be separated, making the design maintenance and managementmuch moreflexible.Spaceborne SAR echo data received by the stationary ground equipment throughfeedback channel has been compressed based on the BAQ compression algorithm, thereverse process of which, decompression that followed by a collection of imaging processes,should be therefore implemented to recover original data. To meet requirements of thereal-time performance, the BAQ decompression algorithm is to be implemented in FPGAsin consideration of its high speed and the stability. Based on the fact that quantization lossis inevitable, in this paper we introduce an improved method, the fixed-point BAQdecompression algorithm. It proves that SAR echo data can not only be recovered exactlycompared to the floating point method, but also save FPGAcosts to large degree.