The Digital Phase-locked Loop Design And Research Based On FPGA

With the rapid development of electronic technology and information science, and at the same time, many technical difficulties have been broken up by phase locke d loop technique. Thus its application field has been widely expanded.It has been use d in the field of space applications originally.However,it has been applied to the field of communication,medical and military and other fields now. At present,this techniqu e has become a large scale integrated circuit and an indispensable module of a high qu ality electronic equipment such as SoC. The performance of phase-locked loop impro ves rapidly because of the appearance of digital phase-locked loop. It can overcome a series of problems in the analog phase-locked loop such as Dc components of saturate d, zero drift and something needs initial calibration.As the integrated circuit technolog y has been becoming more and more advanced, all digital phase-locked loop(ADPLL) appears thereafter, which makes all kinds of module structures composed of digital c ircuits. The advantages of it are the real-time processing ability, strong anti-interferen ce, small volume and high reliability. This paper gives an design, an all digital phase-1 ocked loop structure which can varise increasely or decreasely, meanwhile, for the ph ase-locked loop,the paper gives the design of circuit and the simulation analysis of it.The main work studied in this paper is as follows:(1)Giving the systematical analysis and study of the structure and performance that belongs to each component of a phase-locked loop, the paper puts forward to digital phase-locked loop structure design which is based on the increase or decrease in variable counter type;(2)The test shows the detail structural design and circuit design that belong to all digital phase-locked loop’s each module, the circuit is simulated at the same time;(3)Based on the circuit design and simulation of each module, the whole structural design and contrast simulation analysis is realized. The simulation results show that the all-digital phase-locked loop has the advantage of high fast lock, easy integration and flexible control, etc.