Research And Implementation Of Receiving Key Technology Based On The Short Burst Spread Spectrum Signal

With human entering modern society, how to communicate accurately and effectively in a various and serious environment is now an important problem. As a special way of communication in modern society, spread spectrum communication plays an important role in military communication. Burst communication means sending out signal in a very short period of time, the other time is in a state of silence, that is why it has a strong ability of anti-interference. LDPC code is a good channel error correcting code, has been shown to have the potential to approach the Shannon limit. Combining burst and spread spectrum technology with LDPC code effectively in modern society will meet the need of real time communication system of high speed and high performance, which is the most promising solution to the future deep space communication and the fourth generation of mobile communication. In recent years, with the rapid development of EDA technology and the emerging of all kinds of FPGA chips, system on chip is more advantagenous to push the above technology to practical application.In this thesis, the main work is done as follows:1. With a burst of spread spectrum communication system project as the background, a theoretical research and some simulation results for the key technology of digital filter, synchronization acquisition and digital phase-locked loop are given,especially focusing on synchronization acquisition method.2. Construct a 200×300 LDPC check matrix based on quasi-cyclic matrix and verify its performance. When the signal-to-noise ratio Eb/N0 is equal to 2.3d B, the frame error rate of the LDPC code can reach 10-2 using BP decoding algorithm.3. Program on the above receiving technology using Verilog language. A kind of good performance, low complexity of synchronization acquisition implementation scheme about PMF-FFT method is designed, combining the resource of software and hardware with the processing speed of the FPGA chip.4. In order to push the timing acquisition scheme into practical application, this thesisproposes a adaptive threshold determination technology based on the signal power. Added to a related system for a test, this method works steadily and effectively.